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Tips for SMT Design
Helpful SMT design hints from the readers of PCD
- by Pete Waddell
SMT has been one of the most significant factors affecting PCB design in the last 10 years. It has allowed more functionality to be integrated into ever-decreasing real estate and has been responsible, in part, for an explosion in the availability of the products to which we are quickly becoming addicted.
For example, imagine a beeper or cellular phone designed and manufactured using through-hole technology. Each would need to be approximately 10 times the size of the marvels we now consider old hat. These items would also be a bit unwieldy and would certainly be too large to hang on a belt. A cellular phone, for instance, would be the size of a notebook computer.
Thankfully, SMT is here and, for the foreseeable future, is here to stay. But many designers are still struggling with surface mount and the problems inherent in the "more in less" philosophy of the '90s. With these words in mind, we thought a few tips would be in order for designers who are new or relatively new to SMT. Here are an even dozen tips for surface-mount design layout. Some are tongue-in-cheek, and some are serious. We hope you can tell the difference and that they may prove helpful.
During placement, ensure that there is enough real estate around fine-pitch devices to allow for full fan-out/fan-in. The spacing between the pins of many components, especially those of the metric flavor, is decreasing at an amazing rate. For testability and rout ability, every pin must be accessible.
If you have not already, take up religion. Viaonous, the Greek deity of routing, is one suggestion, but almost any other deity should help at least a little bit.
Ensure that design rules allow entry to the pads. Routing of 0.010" x 0.010" grids (auto or interactive) will not work well on a 0.019"-pitch device.
Try to shadow components mounted on the top and bottom surfaces of the board. This should allow for a maximum number of fan-out/fan-in
Use a via size that is consistent with the technology. A 0.060" via on a fine-pitch design is a waste of real estate. On the other hand, a finished via less than 0.010" may cause prohibitive cost problems in manufacturing.
Use a fan-out grid that allows for at least one track between the vias and device pins.
Even if some signals are to be pre-routed, fan-out/fan-in the entire design first, and then connect the pre-routes.
Power and ground traces connecting devices should be at a width that makes entry to the pads feasible. A trace larger than the pad can cause shorts as well as other complications.
Make sure that traces that connect to a via employ a line width that matches the via pad diameter. Sometimes this means "necking" the trace as it enters the via. Try to neck at least 0.050" from the via. This improves manufacturability.
When possible, share power connection vias to the plane. This increases the number of routing channels on the inner layers.
Check with your manufacturer about using vias in component pads. If the via is filled with solder, the pad retains its integrity. One problem here is ensuring that sufficient solder is deposited on the pad to fill the hole. Again, check with your manufacturer.
Find a good therapist. Dr. Sigmund Floyd of Vienna, AL, has been known to offer group discounts for designers and has specialized in this field. It is possible that he has associates in your area.
These are the first of PCD's surface-mount tips. If you have a design tip, trick or technique you'd like to share with our readers, send it to us. We will publish them in upcoming issues as we gather them. Tips one through 10 were furnished by Nigel S. Aves of
Intergraph Electronics' Boulder, CO, office who also reminds us that it is better to burn out than to fade away. Thanks Nigel, may your rats nests be orderly and your densities be acceptable.